INVITED SPEECH | ||
Jim Stathis - IBM Research, Yorktown Heights NY Current and future issues in transistor dielectric reliability | ||
Abstract | ||
Gate dielectrics are key to MOS transistor performance and, at the same time, their Achilles heel for reliability. The standard failure mechanisms -- breakdown, threshold voltage instability -- have not changed, but insulator thickness reduction and materials changes continually challenge our understanding. This talk will describe new and improved physics understanding and statistical methods which are needed to enable us to anticipate the effects of scaling on reliability. | ||
Biography | ||
Jim Stathis received the bachelor's in physics from Washington University in St. Louis (1980), and the Ph.D. in physics from the Massachusetts Institute of Technology (1986), joining the IBM Research Division the same year. At IBM the focus of his work has been fundamental and practical studies of transistor reliability, including the electrical properties of point defects in SiO2, and the role of defects in wearout and breakdown. He is the author or coauthor of more than 150 research papers and over 70 invited talks and tutorials. From November 2005 to February 2007 he served as Technical Assistant to the Vice President for Science and Technology, IBM Research Division. In February 2007 he became manager of High-k/Metal-Gate Characterization and Reliability, IBM Research. In November 2017 he became head of operations and strategy for science and technology, reporting to the Vice President of Science and Government Programs, IBM Research. Jim has served on technical program committees for IEDM, SISC, INFOS, IRPS, ESREF, IPFA, MIEL and other conferences, and as an an Associate Editor of the journal Microelectronics Reliability. He was the Technical Program Chair for IRPS 2009 and General Chair for IRPS 2011. He has presented tutorials on CMOS reliability at IRPS, ESREF, MRS, and IPFA. He is a Fellow of the American Physical Society and an IEEE Fellow. |